IBM, GlobalFoundries and Samsung developed a breakthrough process for building 5nm chips
IBM, GlobalFoundries and Samsung developed a breakthrough process for building 5nm chips.
The technology is called nanosheets that can help shrink chip electronics, this can squeeze more computing power into a smaller processor.
The 5nm chip uses a gate-all-around transistor (GAAFET), with the gate material wrapped around a trio of horizontal silicon nanosheets, as compared to the vertical fin design (FinFET) that’s used in current chips. They expect a 40 percent performance boost at the same level of power consumption compared with today’s chips or the same performance but using only a quarter the power.
Today’s chips are built with transistors whose dimensions measure 10nm. The next generation will shrink that dimension to 7nm, and the IBM-Samsung development goes one generation beyond that to 5nm. There is still a distance between this research announcement and actual commercial manufacturing.